Educational guide 2021_22 School of Engineering

Bachelor's Degree in Computer engineering (2010)

Contents

Topic	Sub-topic
1 Introduction	1.1 Overview of the NDS system
2 Internal organisation of a programable system	2.1 Computer components 2.2 Bus access regulation (Chip Select) 2.3 Memory address controller 2.4 Reflected memory zones 2.5 Access to input/output registers
3 Internal organization of the NDS platform	3.1 Interconnection of main components 3.2 Memory maps and input/output registers 3.3 Example of an input/output controller: buttons
4 The NDS display controllers	4.0 Introduction to computer graphics (2D) 4.1 Interconnection of graphic components 4.2 Graphic background modes 4.3 Video RAM memory banks 4.4 Frame Buffer mode 4.5 Background control registers 4.6 Text backgrounds 4.7 Rotation/Scale backgrounds 4.8 Moving graphical objects (sprites)
5 Input/Output synchronization	5.1 Necessity for I/O synchronization 5.2 Synchronization by polling 5.3 Synchronization by interruptions 5.4 The interrupt controller 5.5 Management of Interrupt Service Routines (ISR) 5.6 Synchronization by timed interruptions
6 Input/Output transfers processes	6.1 Transfers through CPU 6.2 Transfers through DMA (Direct Memory Access) 6.3 The DMA controller 6.4 Examples of DMA transfers
7 The NDS Sound controller	7.1 Basic features 7.2 Playing sampled sound 7.3 Polyphonic sound and frequency variation 7.4 Access to the sound controller hardware
8 Communication between ARM9 and ARM7 processors	8.1 Necessity of communication between processors 8.2 Synchronisation through IPCSYNC 8.3 Example of synchronisation 8.4 Information transfer through IPCFIFO 8.5 Example of transfer

Competences	Learning outcomes	Contents
Planning	Methodologies	Personalized attention
Assessment	Sources of information	Recommendations