IDENTIFYING DATA 2015_16
Subject (*) COMPUTER STRUCTURE Code 17234108
Study programme
Bachelor's Degree in Computer engineering (2010)
Cycle 1st
Descriptors Credits Type Year Period
6 Compulsory Second 2Q
Language
Català
Department Enginyeria Informàtica i Matemàtiques
Coordinator
MOLINA CLEMENTE, CARLOS MARÍA
E-mail carles.aliagas@urv.cat
carlos.molina@urv.cat
Lecturers
ALIAGAS CASTELL, CARLOS
MOLINA CLEMENTE, CARLOS MARÍA
Web http://moodle.urv.cat
General description and relevant information The course aims to initiate students in the design and evaluation of a computer, in terms of cost, performance and consumption: functional units, memory subsystem and segmentation.

Competences
Type A Code Competences Specific
 CM9 Know, understand and evaluate the structure and architecture of computers, and the basic components that comprise them.
Type B Code Competences Transversal
 B3 Be able to solve problems with initiative, make decisions, be creative, use critical reasoning and communicate and transmit knowledge, abilities and skills in the field of the profession of technical IT engineer.
Type C Code Competences Nuclear
 C4 Be able to express themselves correctly both orally and in writing in one of the two official languages of the URV

Learning outcomes
Type A Code Learning outcomes
 CM9 Understand the organisation and functioning of Von Neumann architecture subsystems: processor, memory, and input/output.
Understand the functioning of the digital elements that constitute a processor (ALU, registry, address calculation, sequencer, etc.) and understand how they are involved in the execution of programmes written in machine language.
Understand and evaluate the essential factors that affect the performance, cost and consumption of a processor.
Design and evaluate functional units, combinational blocks and sequential blocks using logic gates.
Evaluate the costs and performance of the functional units.
Design and evaluate a simple processor at block-level.
Be able to analyse and design segmented processors and evaluate their performance.
Design and evaluate the memory subsystem of a computer.
Type B Code Learning outcomes
 B3 Gives presentations correctly and effectively in the context of the subject. The information transmitted is relevant and pertinent to the topics understudy.
Type C Code Learning outcomes
 C4 Produce grammatically correct oral texts.
Produce well structured, clear and effective oral texts.
Produce oral texts that are appropriate to the communicative situation.
Produce grammatically correct written texts
Produce well-structured, clear and rich written texts
Produce written texts that are appropriate to the communicative situation

Contents
Topic Sub-topic
1. Introduction 1.1. History of computing.
1.2. Von-Neumann architecture.
1.3. Key Concepts.
1.4. Trends un microarchitecture.
1.5. Challenges in processor design.
1.6. Instruction stages
1.7. Cost and performance
2. Design of functional units 2.1. Key concepts
2.2. Adders: CPA,CSA,CLA
2.3. Multpliers: sequential, array, tree
2.4. Division
2.5. Floating point: IEEE 754
2.6. Cost and performance
3. Design and evaluation of a simple computer 3.1. Key concepts
3.2. Components.
3.3. Processing unit.
3.4. Control unit.
3.5. Evaluation.
3.6. Performance.
4. Analysis and design of pipelined processors 4.1. Key concepts.
4.2. Pipelining.
4.3. Hazards: structural, data and control.
4.4. Advanced microarchitectural techniques
4.5. Performance
5. Design and evaluation of the memory system 5.1. Key concepts.
5.2. Memory hierarchy: temporal locality, spatial locality.
5.3. Cache memory: placement policy, access policy, replacement policy, write policy.
5.4. Virtual memory.
5.5. Performance.

Planning
Methodologies  ::  Tests
  Competences (*) Class hours
Hours outside the classroom
(**) Total hours
Introductory activities
2 0 2
Lecture
CM9
16 26 42
Problem solving, classroom exercises
B3
10 16 26
Laboratory practicals
C4
22 48 70
Personal tuition
4 0 4
 
Objective short-answer tests
CM9
2 0 2
Extended-answer tests
B3
2 0 2
Practical tests
C4
2 0 2
 
(*) On e-learning, hours of virtual attendance of the teacher.
(**) The information in the planning table is for guidance only and does not take into account the heterogeneity of the students.

Methodologies
Methodologies
  Description
Introductory activities Description of the objectives, content and assessment process.
Lecture Explanation of theoretical concepts using slides and whiteboard.
Problem solving, classroom exercises Exercises related to the background theory are presented to the students
Laboratory practicals Application of theoretical knowledge to specific situations, using computers, simulators and other laboratory stuff.
Personal tuition Clarification of concepts and solving questions individually

Personalized attention
Description
Professor is available at his office to attend students individually in order to solve any question related to the course.

Assessment
Methodologies Competences Description Weight        
Objective short-answer tests
CM9
Test of short questions where students must show the theoretical knowledge of the subject 25%
Extended-answer tests
B3
Test consisting of problem solving where students will apply theoretical knowledge of the subject 25%
Practical tests
C4
Working in group to develop a project: preliminary analysis, design, implementation and documentation. There will be an individual interview 50%
Others  
 
Other comments and second exam session

First call: continuous assessment

Second call: a final exam and an individual project


Sources of information

Basic Professors EC, Transparències EC, 2012, ETSE-URV
David A. Patterson y John L. Hennessy, Estructura y Diseño de Computadores: La Interfaz Hardware/Software, 2011, Editorial Reverté
William Stallings, Computer Organization and Architecture, 2010, Prentice Hall
John L. Hennessy y David A. Patterson, Computer Architecture: A Quantitative Approach, 2006, Morgan Kaufmann

Complementary John Paul Shen, Modern processor design : fundamentals of superscalar processors , 2005, McGraw Hill
Mano M. Morris, Charles R. Kime, Fundamentos de diseño lógico y de computadores, 2005, 2005, Prentice Hall
José Ignacio Hidalgo Pérez, Problemas de fundamentos y estructura de computadoras, 2009, Prentice Hall
Felix García Carballeira, Problemas resueltos de estructura de computadores, 2009, Paraninfo
Sergio Díaz Ruiz, Estructura y tecnología de computadores : teoría y problemas, 2009, McGraw Hill

Recommendations

Subjects that continue the syllabus
COMPUTER ARCHITECTURE/17234109


Subjects that it is recommended to have taken before
FUNDAMENTALS OF COMPUTERS/17234002
COMPUTERS/17234107
(*)The teaching guide is the document in which the URV publishes the information about all its courses. It is a public document and cannot be modified. Only in exceptional cases can it be revised by the competent agent or duly revised so that it is in line with current legislation.